Closed loop variable frequency signal generator

ABSTRACT

A frequency conversion circuit for use in frequency synthesizers, frequency counters, and similar apparatus. Frequency mixing means having first and second inputs is provided, an input frequency being applied to the first mixing means input and a stepping frequency being applied to the second mixing means input. The mixing means is responsive to the input frequency and the stepping frequency to provide an output signal having a frequency equal to the frequency difference between the input frequency and the stepping frequency, both when the input frequency is higher than the stepping frequency, and when the input frequency is lower than the stepping frequency. For a single stepping frequency, an identical mixing means output signal is thus provided for two input frequencies. Means are also provided for determining whether the input frequency is higher or lower than the stepping frequency. Such a circuit may be used in frequency synthesizers using phase-locked loops, for instance, to lock the loop to two different output frequencies with a single stepping frequency.

United States Patent Fried Aug. 26, 1975 l l CLOSED LOOP VARIABLE FREQUENCY SIGNAL GENERATOR Primary [itunirncr-Siegfried Hi Grimm Alli/mm. Agent. or firm-Christensen O'Connor. Garrison 1S; Hnvclka i751 Inventor, Raymond L. Fried. Lynnwoodv Wash [57] ABSTRACT {7H Assignee: .luhn Fluke Mfg. 11.. Inc..

Moumplkc Tel-raga w A frequency conversion circuit for use in frequency synthesizers. frequency counters. and similar uppara hltdtus. Frequency mixing means having first and second 211 App], N 4 739 inputs is provided an input frequency being applied to H the first mixing means input and a stepping frequency Related Appl'catm" Dam heing applied to the second mixing means input. The [63} Continuation-in-pzirt of Ser No, 329621 Fen 5v mixing means is responsive to the input frequency and lwldhimdoncdthe stepping frequency to provide an output signal having a frequency equal to the frequency difference l l Sui/l5; 33l/lgl 33l/22? hetween the input frequency and the stepping fre 331/251 33l/l83 quency both when the input frequency is higher than l l H03B 3/02; H03B 3/04 the stepping frequency, and when the input frequency l l Field Search 33 l/lis lower than the stepping frequency. Fora single step 33l/l 83 ping frequency, an identical mixing means output signal is thus provided for two input frequencies. Means l l References cued are also provided for determining whether the input UNITED STATES PATENTS frequency is higher or lower than the stepping fre- 3,u23,37u 2/l962 Waller 331/25 x quency- Such l1 Circuit y be used in frequency y"- ims uus 9 9 Gunman cull, 33 19 X thesizers using phase-locked loops, for instance. to 3365676 M968 Buss. 331/18 X lock the loop to two different output frequencies with 140L353 9;"l968 Hughes v IUHIH X a singI tepping frequency, 1427.56] 2/1969 Harncr i y y i i i v 33l/l9 14 Claims, 9 Drawing Figures l' 'A: //J W awn DEZ' /za l A! l I n! F avr l I P/A/ fildA/AL 0/005 fiaMme s ur/2 Z l l Ln 2c J l/s'aume //2 A? I 00 iv a kw a a; i l H Mel/w I me M/X mam/m F/z r52 i N {d t Mn/r z Wm! X6 7 (Mantra! ,qyzf .92 f mew/yr PMS; 1 MP a mt: a, MJ/

a flyz x4 A mi/mrie W Adz I nu; /fl- *9 656' M lLkE e rm/R/r f0 Fmvr Awir. L 06/6 w m mamas (our/e01. mm/rsrzie W. 255 5? a f PATENTED AUGZSIQYS sum 3 BF 5 PATENTED Aunzsms saw or 5 CLOSED LOOP VARIABLE FREQUENCY SIGNAL GENERATOR BACKGROUND OF THE INVENTION This is a continuation-in-part of application Scr. No. 329,621, filed Feb. 5, l973, entitled Frequency Syn thesization Conversion Apparatus, and now abandoned.

The present invention relates generally to the frequency mixing art, and more specifically to the art of frequency synthesizers using frequency mixing means.

The concept of a frequency synthesizer which uses phase-locked loops to generate selected output frequencies is well-known in the art. Furthermore. the use of a series of stepping frequencies with such phaselocked loop synthesizers to provide continuous constant increment frequency coverage over a given out put frequency range is also well-known. Typically, such frequency synthesizers use a series of stepping frequencies (f,.,,.,,) equal to N times a reference frequency f where N is an integer which varies in a regular fashion (e.g.. l, 2, 3 To avoid frequency discontinuties over a given output range,f,,,, must be equal to or less than the difference frequency between the highest and lowest input frequencies applied to the phaselocked loop. This relationship can be expressed as follows:

fre! .fb fr!) where j}, andf,, are the high and low input frequencies. respectively.

The generation of the stepping frequencies becomes significantly more difficult and expensive, however, as frequencies into the microwave frequency region are desired at the output of the synthesizer. Furthermore, at such high frequencies, the f signal sidebands present in the generated f signals hinder significant reduction of spurious signal output from the synthesizer.

Another technique for generation of stepping frequencies uses a harmonic frequency generator, such as a step recovery diode, in combination with selective filter. At the microwave frequencies, such a system becomes economically practical when compared with RF circuitry. However, the minimum necessary frequency separation between adjacent stepping frequencies to provide continuous constant increment frequency coverage over the output frequency range is frequently not great enough to enable state-of-the-art selective filters to select just one frequency from the harmonics available. Significant signal energy from adjacent frequencies is present, resulting in the injection of spurious sig nals into the phase-locked loop.

In accordance. with the above, it is a general object of the present invention to overcome the disadvantages of the prior art.

It is another object of the present invention to reduce the number of stepping frequencies in a frequency synthesizer using phase-locked loops necessary to achieve continuous constant increment frequency coverage over the output frequency range.

It is another object of the present invention to provide a practical frequency conversion circuit for use in frequency synthesizers which provide output frequencies in the microwave frequency range.

It is a further object of the present invention to provide a frequency conversion circuit for use in a frequency synthesizer wherein a single stepping frequency is used in combination with a predetermined range of input frequencies to cover two independent portions of the output frequency range.

it is another object of the present invention to provide a frequency conversion circuit for use with other circuiting wherein a single stepping frequency may be used to cover two portions of the frequency range used in the other circuitry.

Other and further objects, features and advantages of the present invention will become apparent as the description of the preferred embodiment proceeds.

SUMMARY OF THE INVENTION Accordingly, the present invention includes a frequency mixing means having two inputs. A source of stepping frequencies is connected to one input. and a source of input frequencies is applied to the other in put. The frequency mixing means is responsive to a input frequency and a stepping frequency to produce a frequency mixer output signal having a frequency equal to the difference between the input frequency and the stepping frequency applied at its inputs. A difference frequency is generated by the frequency mixing means both when the input frequency is higher than the stepping frequency and when the input frequency is lower than the stepping frequency. Means are provided for comparing the stepping frequency with the input frequency, the comparing means producing a first output if the input frequency is higher than the stepping frequency and a second output if the input frequency is lower than the stepping frequency. Means are also provided responsive to a single difference frequency from said frequency mixing means and said comparing means to produce a first output frequency when the comparing means produces said first output signal and a second output frequency when the comparing means produces said second output signal. A single stepping frequency may thus be used to produce output frequencies both when the input frequency is higher than the stepping frequency and when the input frequency is lower than the stepping frequency.

More specifically, the present invention in one aspect thereof in an embodiment of a frequency synthesizer, includes a phase-locked loop comprising a series connection a voltage controlled oscillator, a frequency mixing means, and a phase actuator. The frequency mixing means is responsive to output frequencies generated by the voltage-controlled oscillator and at least one stepping frequency to produce a frequency mixing means output signal having a frequency equal to the frequency difference between the output frequency and the stepping frequency applied to the voltage controlled oscillator. The phase detector is responsive to the frequency mixing means output signal and an input frequency to produce a phase detector output signal which in turn controls the output frequency of the voltage-controlled oscillator. The phase detector is responsive to the frequency mixing means output signal both when the output frequency of the VCO is higher than the stepping frequency and when the output frequency of the VCO is lower than the stepping frequency. A single stepping frequency can thus be used to generate first and second output frequencies for a given input frequency. Selection means are provided to permit an operator to select one of said first and second frequencies. A control means, responsive to the selection means, operates in conjunction with the phase detector to control the VCO such that the selected one of said first and second output frequencies is generated.

Furthermore, in the synthesizer embodiment, a plurality of stepping frequencies and input frequencies may be produced, wherein each combination of input frequency and stepping frequency has associated therewith the two output frequencies. Means are provided for selecting the proper input frequency and stepping frequency for the selected output frequency. The control means operates as above to assist in controlling the VCO to generate the selected output frequency from the two output frequencies possible.

DESCRIPTION OF THE DRAWINGS A more thorough understanding of the invention may be obtained by a study of the following detailed description taken in conjunction with the accompanying drawings in which:

FIG, I is a simplified block diagram of a prior art frequency conversion circuit, illustrating the operation of a phase-locked loop responsive to a series of stepping frequencies.

FIG. 2 is a frequency distribution chart for the prior art showing the continuous constant increment output frequency coverage for successive stepping frequencies relative to a specified range of input frequencies.

FIG. 3 is a frequency distribution chart for the circuit of the present invention showing the continuous constant increment output frequency coverage for selected stepping frequencies relative to a specified range of input frequencies.

FIG. 4 is a simplified block diagram of a frequency conversion circuit showing a first modification of the circuit of the preferred embodiment.

FIG. 5 is a simplified block diagram showing a second modification of the circuit of the preferred embodimerit.

FIG. 6 is a block diagram of a preferred embodiment of the frequency conversion circuit,

FIG. 7 is a block diagram of the logic control portion of the circuit shown as a single block in FIG. 6.

FIG. 8 is a chart showing an output frequency range broken down into a series of output frequency portions, and the associated stepping frequency and the direc tion of frequency change in the input frequency for coverage of each output frequency portion.

FIG. 9 is a simplified block diagram of the presteering portion of the circuit shown in FIG. 6.

DESCRIPTION OF THE PREFERRED EMBODIMENT Although the present invention in its preferred embodiment is described in the context of a frequency synthesizer, it should be recognized that the invention may be used with other apparatus, such as frequency counters, or any other circuitry using the difference frequency output of a frequency mixer to generate a given range of output frequencies. The description of the frequency synthesizer embodiment will serve to clarify the function and advantages of the frequency conversion circuit over the prior art, in a frequency synthesizer as well as with other circuits.

Referring to FIG. I, a simplified block diagram of a prior art single phase-locked loop frequency synthe' sizer is shown. In operation, a predetermined range of input frequencies, f is supplied at one input 10 of phase detector 11. The range of input frequencies has low and high boundaries, respectively, off and f, and is typically provided by a previous phase locked loop synthesizer circuit, or from another frequency synthesizer. For continuous constant increment frequency coverage of the output frequency range, the reference frequency (I' must be equal to or less than (L, f,,) where j}, is greater than f,,, expressed as follows:

frv'! S (fl1 fu)- The reference frequency f drives a stepping frequency source [2, which generates a series of stepping frequencies. One selected stepping frequencyf,,,,.,. is applied via Iine I3 to one input of a frequency mixer 14. F is typically an integral multiple of the reference frequency and varies according to the formula N .rf where N is a variable whole integer introduced by the stepping frequency source 12.

Applied on line 17 to the other input 17a of the frequency mixer 14 is a portion of the circuit output signal f from the voltage-controlled oscillator 16. The mixer 14 produces sum and difference frequencies between the signals applied at its respective inputs 13a and ]7a, which sum and difference frequencies are applied on line 18 to a Iow-pass filter 20, which passes the difference frequencyv The difference frequency is applied over line 19 to input 15 of phase detector II. Phase detector ll compares the phase of the signals present at inputs l0 and I5, and generates a DC output signal. which is proportional in magnitude to the phase difference between the input signals. The DC output signal from the phase detector 11 is applied to the VCO l6 and controls its output frequency accordingly. The loop will stabilize when the difference frequency between f andfl is equal to the frequency of the input signal f at input 10 of the phase detector II.

The relationship between the frequency output of the mixer I4, the output signal f,,,,,,f,,,.,, andf when the loop is stabilized can be expressed as follows:

fuuZn-r nlilpul fuul fifllp fimuul- Furthermore, since f is equal to N x f,,.;. the output frequency/ of the VCO I6 when the loop is stabilized may be expressed in terms of the reference frequency as follows:

fun! fiumil N x frr'l- Referring to FIG. 2, the output frequency coverage for the circuit of FIG. I is illustrated. For purposes of explanation, it is assumed that the input frequency boundaries arefl,= 2f,,. and thatf is equal to (f, f,, )7 With these assumptions, an output frequency range of of,, through l2f,, may be covered with successive f,.,,.,,,, of 5] through l0f,,. When the input frequency varies over a one octave frequency range, as shown in FIG. 2, (f), 2f,,) the frequency separation between adjacent stepping frequencies must likewise not exceed this same one octave frequency bandwidth of the input frequencies, if continuous constant increment coverage of the output frequency range is to be achieved. In prior art synthesizers using phase-locked loops, a single step ping frequency, e.g., 5f is used to cover one portion of the output range e.g., of through 7f...

Referring now again to FIG. I, it has previously been explained that the loop will stabilize at a specific output frequency f,,,,, when the difference frequency from lowpass filter 20 is equal to the input frequency applied at input [0 of phase detector 11. The difference frequency value from low-pass filter 20, however, is the absolute frequency difference hetweenf and f,,,,,. A single stepping frequency may thus be used to generate either of two output frequencies for a given input frequency, and more broadly, to provide frequency coverage of two independent portions of the desired output frequency range, The loop will stabilize when the frequency of the output signal f on line 17 is either greater than or less than the stepping frequency by the frequency of the input signalf Prior art synthesiz ers using phase-locked loops, however, do not utilize this capability of the frequency mixer. Rather, prior art circuits use only that difference frequency from mixer 14 wherein the output frequeneyf,,,, is greater than the stepping frequency f Typically, such circuits use a phase detector responsive only to a difference frequency whenf is greater thanf Such circuits pro vide the output frequency coverage shown in FIG. 2.

FIG. 3, illustrates the output frequency coverage when a single stepping frequency f is used to cover two independent output frequency range portions. By independent is meant that the two portions are separated by a number of intervening output frequencies using other stepping frequencies. Again,f,, 2f,, andf f,, f,,). Each frequency in one portion of the output is higher in frequency than the stepping frequency by the value of the input frequencies, and each frequency in the other portion is lower in frequency than the stepping frequency by the value of the input frequencies. Thus, for example, for a stepping frequency of 8f,,, and an input frequency range off through 2f,,, the respective independent portions of the output frequency range covered are 6f,, through 7f and 9f through l0f,,. Referring to FIG. 2, two stepping frequencies, Sf and 8f,,, would be necessary to cover those same output frequency portions in the prior art. Thus, comparing FIGS. 2 and 3, the same continuous constant segment output frequency coverage may be achieved with significantly fewer stepping frequencies than previously required. This results in considerable savings with respect to the circuitry necessary to achieve the required series of stepping frequencies and provides other advantageous results more fully dis cussed in following paragraphs.

FIG. 6 shows an embodiment of a frequency conversion circuit using a single stepping frequency for coverage of two independent output frequency range portions. with a reference frequency of 160 MHz, an input frequency range of 80l60 MHz and an output range of 2.l-2.8 GHz. A SMHZ standard frequency is gener ated by crystal oscillator 52, the output of which is multiplied by times-four multiplies 54 and times-eight multiplier 56 to produce the reference frequencyf of I60 MHz. The 160 MHZ reference frequency is applied to a stepping frequency selection circuit 58. Selection circuit 58 includes a nonlinear diode 60 or similar device which is responsive to the 160 MHz reference signal to generate a signal containing a large number of harmonics of I60 MHz. The output of the diode 60 is applied to a frequency discriminating circuit 62 such as a YlG filter, which is currentcontrolled to select one frequency from the harmonics generated by diode 60.

The selected frequency output from the Stepping fre quency selection circuit 58 is applied through a 10 db isolation circuit 64 to one input 66 of frequency mixer 68. The 10 db isolation circuit 64 provides electrical isolation between the mixer 68 and the stepping frequency selection circuit 58. A portion of the output signal f is applied at input 70 of mixer 68. The sum and difference frequencies between the signals at inputs 66 and of mixer 68 are provided at output 72. and in turn applied through a 3 db isolation circuit 74 to a low-pass filter 76. The output of low-pass filter 76, which is the difference frequency from mixer 68, is applied at input 78 of a phase detector 80. Applied to the other input 82 of phase detector is the input frequency signal, f,-,,,,,,,, the selection and generation of which with respect to a desired output frequency will be more fully explained in following paragraphs. Phase detector 80 compares the phase of the signals at its inputs 78 and 82, and generates an output control signal, the magnitude of which is proportional to the phase difference between the signals at inputs 78 and 82. The output of phase detector 80 is amplified by amplifier 84, the output of which is applied at one input 86 of search and lock circuit 88. Search and lock circuit 88 is initially responsive to control signals at input 89 from logic control circuit 90 through D/A converter 92 to presteer or initially set the frequency of the VCO 94 to the vicinity of the frequency at which it will be operating for a selected output frequency. After presteering, the output of the phase detector 80 is applied at input 96 of the VCO 94. in conventional fashion, the frequency of the output of VCO 94 will be proportional to the magnitude of the control signal from phase detector 80.

The output of the VCO 94 is applied at input 98 of pin diode 100, which acts to attenuate the amplitude of the output signal from the VCO 94. The output of the pin diode 100 is applied through isolator circuit 102 to input 103 of signal splitter 104, which has three outputs. Signal splitter 104 splits the signal present at its input 103 into three output signals identical in waveform but having different power levels. The signal at output 106 has the greatest power, and is the output signalf of the synthesizer circuit, appearing at circuit output 108. The signal at output 110 is applied through an isolator circuit 2 to input 70 of mixer 68.

The VCO 94, pin diode I00, signal splitter [04, mixer 68, low-pass filter 76. phase detector 80, amplifier 84, and search and lock circuit 88, with isolators 74, 102 and 112, form a phase-locked loop. ln conven tional fashion, the output frequency of VCO 94 will vary under the control of phase detector 80 until the input frequency f at phase detector input 82 is equal to the difference between f from the VCO 94 and the stepping frequency f from selection circuit 58. At that point, the loop is locked, and the frequency off will remain steady.

The phase-locked loop includes a level control cir cuit 119. The desired power level of the output signal at 108 may be established by the operator through front panel control circuit 126. The signal at the third output 114 of signal splitter 104 is applied to a power detector 116, which looks at the power level of an applied signal. Since the signal splitter 104 distributes the power of the signal present at its input I03 into predetermined fractions at its respective outputs, the power level of the signal at output 114 will vary proportionately with a variance in the power level of the signal at input 103. The output of power detector 116 is a DC signal having a magnitude which is proportional to the level of power of the signal applied at its input from signal splitter 104. As the power from signal splitter I04 varies, the magnitude of the output of detector 116 will vary accordingly. This varying signal is applied at input "8 of amplifier [20, which is also responsive to control signals from the front panel controls 126 at input 122. Amplifier 120 compares the signals present at its inputs l 18 and 122 and generates an output control signal which is applied at input 124 of pin diode 100. For a given control signal level present at input 122, the magnitude of the output of amplifier 120 will change in proportion to a change in the magnitude of the signal present at input 124. The attenuation level of the pin diode changes correspondingly. thereby altering the level of the output from VCO 94. The level control circuit 119 thus tends to maintain the power level of the conversion circuit at a constant preselected level.

The desired frequency which is to be generated by the conversion circuit is selected by an operator by means of front panel control circuit 126, which includes a series of rotary switches (not shown), one for each digit in the selected output frequency. The number of rotary switches may vary, of course, with the intended application of the synthesizer circuit, but for purposes of explanation, seven rotary switches. corresponding to seven frequency digits, are used in the syn thesizer embodiment of the present invention.

As explained above, continuous constant increment frequency coverage of an output frequency range of 2.l-2.8 GHz may be achieved with a reference frequency of I60 MHz and an input frequency range of 8U-l60 MHz. Other output frequency ranges may, of course, be accomplished with corresponding reference and input frequency ranges.

The setting established by an operator on the rotary switches or similar selection circuitry is converted conventionally into corresponding binary coded digit format, and the BCD signals are then applied to logic control circuit 90. The logic control circuit 90 compares the BCD signals from circuit 126 with each location in its pre-established read only memory look-up table. Each output frequency capable of being selected will have associated therewith in read-only memory a signal representative of a particular stepping frequency, a signal representative of a portion of a particular input frequency, and a signal indicating whether the selected output frequency is in the output range portion above or below the stepping frequency. This information for each possible output frequency is precalculated, and established within the memory of the logic control circuit 90, such that the three signals noted above associated in memory with the desired output frequency are available to the control circuit 90 when a correct comparison is made between the desired output frequency selected by the operator, and its corresponding location in memory.

When a correct comparison is made, the logic circuit 90 generates three output signals. One output signal is applied to an 80460 MHz frequency synthesizer 128 for control thereof to generate the proper input signal to be applied to input 82 of phase detector 80, while the other two output signals are applied to the D/A converter 92. One of the output signals to D/A converter 92 from control circuit 90 appears on output lines 128a, l28b. 128C and 128d and is representative of the correct stepping frequency for the generation of the selected output frequency. The D/A converter 92 detects the digital signal present on lines 128a through 128d, and generates a corresponding analog signal which is applied both to current driver circuit 130 for control of selection circuit 58. and to search and lock circuit 88 for presteering of VCO 94. The current driver circuit 130 controls the operation of the selec tive filter 62, which for purposes of explanation is a YlG filter. A YIG filter is a currentdependent device. with the value of its center or pass frequency depending upon the magnitude of current applied to its control input. The correct stepping frequency for a selected output frequency may be obtained by applying a current of appropriate magnitude to the control input of the YlG filter. The signal from logic control circuit 90, and hence the corresponding analog signal from the D/A converter 92 are, as noted above, preprogrammed such that the selection of a particular output frequency re sults in a signal from D/A converter 92 having a magnitude which results in the YIG filter centering about the correct stepping frequency. ln accordance with the principles of the present invention, a single stepping frequencyf is utilized to generate two portions of the output frequency range, and the memory is so programmed.

A third output signal from the control circuit appears on line 132, and is representative of whether the selected output frequency is in the output frequency portion above or below the correct stepping frequency for that output frequency. This signal is also precalcu lated and stored in memory for each selected output frequency. The signal is applied to D/A converter 92, which in turn applies a corresponding analog signal in the form of an offset signal to search and lock circuit 88.

A simplified representation of search and lock circuit 88 is shown in FIG. 9. The analog signals corresponding to the digital signals on lines 128a through 128d oper ate in combination with the offset signal on line 132 to presteer the VCO 94 to near its correct operating fre quency. Presteering of the VCO 94 is necessary because phase detector 88 does not have a large enough capture bandwidth to initially force the VCO 94 into the correct frequency region. Thus, without presteering the phase-locked loop may never stabilize. Referring to FIG. 9, the analog signal from D/A 92 is applied through resistances 93 and 95 in opposition to a known current from current source 97. Connected between one end 95a of resistance 95 and a direct line connection 99 between phase detector 80 and VCO 94 is a first diode I01, the cathode thereof being common to end 950. Connected to the other end 95b of resistance 95 is the anode of diode 103, the cathode of which is connected to the direct connection 99, in common with the anode of diode 101. The respective voltage levels at ends 950 and 95b of resistance 95 are fixed by the level of current source 97, the signal from the D/A converter on lines 1280 through 128d, and the offset current on the line 132. This establishes a frequency window for the VCO 94. The signal on connection 99 from phase detector 80 can never be lower than one diode drop relative to the signal at end 951) and can never be higher than one diode drop relative to the signal at end 95a. The search and lock circuit 88 thus sets fixed boundaries on the magnitude of the signal to the VCO 94 and thus forces the VCO to operate initially within a given range of frequencies over which the phase detector 80 can then properly drive the VCO to a specific frequency.

The offset signal on line 132 from D/A converter 92 affects the operation of the search and lock circuit 88 by introducing an additive or subtractive factor to the signal levels established by current source 97 and the signal on line I33 from the signals on lines I280 through 128d. The offset circuitry is shown diagrammatically as positive and negative current sources 135 11nd I37, respectively, which are responsive to the signah. on lines I39 and I4] from D/A )2 to generate a con esponding offset signal (either positive or negative) on line I43. If the signal on line I43 is positive, the frequency window will be shifted upward in frequency, because the signal levels at the respective ends 95a, 95b of resistance )5 will be shifted correspondingly upward, while if the signal on line I43 is negative, the fre quency window will be shifted downward in frequency. This offset feature assists the presteering of the VCO to the correct output frequency range portion for a selected output frequency.

As explained above, each stepping frequency is utilized with two independent portions of an output frequency range. The relationship between stepping frequencies, input frequencies, and resulting output frequencies is clarified in FIG. 8 for the frequency cover age of 2.l GH'/.2.8 GHz of the preferred frequency synthesizer embodiment. The output frequency range is divided into nine successive portions, each portion having an associated stepping frequency, with a single stepping frequency covering two independent portions in several instances, in accordance with the principles of the present invention. As one example, a stepping frequency of 2.40 GHz is utilized with an output fre quency portion of2.240 (1H2 through 2.32 GHz, which portion is below the stepping frequency, and another portion of 2.98 GHZ through 2.56 GHZ, which portion is above the stepping frequency. To provide continuous constant increment frequency coverage over each por tion, an input frequency range of 0080 through 0.160 GHz is utilized. The generation of a particular output frequency requires the selection and generation of a particular corresponding input frequency, which input frequency is then applied to input 82 of phase detector 80. The input frequencies are tuned from 80- l 60 MHz, when the stepping frequency is lower than the selected output frequency, and are tuned from high I60 MHz) to low (80 MHz) when the stepping frequency is greater than the output frequency range portion in which the desired output frequency is located. The selection of a proper input frequency for a particular output frequency is accomplished by the logic control cir cuit 90.

Referring to FIG. 7, a block diagram of the logic circuitry for providing the proper commands to the 80-160 MHz frequency synthesizer 128 for generation of the input frequencies is shown. The BCD input signals to the logic control circuit 90 may be originated by the front panel control circuit 126, or from a remote input circuit. Each input includes a series of signal lines for the digits of l KHz, l0 KHz, I00 KHz, I MHz, l0 MHz, and I00 MHZ, respectively, and the BCD signals representing the operator selected value of each digit is impressed upon those lines. A connection for the unit GHZ place in the output frequency is not included in FIG. 7 since it is always two. (The output range for the preferred frequency synthesizer embodiment is 2. l2.8 CH2).

In operation, the BCD signals for the I00 MHz and I0 MHz digit places in the selected output frequency are applied to the read-only memory I36. Assuming front panel inputs, the BCD signals representing the 100 MHz and the It) MHz places, appearing on signal lines I37, I38, I39, I40 and 1371:, 138a, 139a, and 14011 sufficiently identify the selected output frequency for the purpose ofidcntifying the particular output frequency portion in which it is located. In conventional fashion, the signals on signal lines I37 through 140 and 137a through I40a are compared with a precalculated lookup table in read-only memory 136 to ascertain which output frequency portion the selected output frequency is in. When the proper memory position has been located, the memory 136 will read out on signal lines 140, I41, 142, 143 a digital number corresponding to the correct stepping frequency, and on line 144 a one or zero, depending on whether the selected output frequency is in a portion above or below the stepping frequency. Lines 140 through 144 are connected to the D/A converter 92, through lines 128a through 128d as explained above. The signal on line 144 besides being applied to D/A 92 through line I32 is also applied as a control signal to select gates I50, 152, I54 and 156. The read-only memory I36 also generates signals over output lines 161, 162, 163 and I64 representative of the correct 100 MHz digit in the input frequency and generates signals over output lines 166, I67, I68, and I69 for the It) MHz digit. Thus, for a selected output frequency, the correct signals to the input frequency synthesizer 128 for the I00 MHz and It) MHz places are generated directly from the read-only memory 136. The signal inputs to the 80l60 MHz input frequency synthesizer I28 for the remaining digits (I KHZ, l0 KHz, I00 Khz, and I MHz) are generated by select gates I50, 152, 154 and I56.

Two sets of inputs are applied to each select gate. a first set of inputs coming directly from the front panel or remote inputs and the second set from the front panel or remote inputs through a complimenting circuit. Each select gate has a series of output lines, which are connected to the input frequency synthesizer I28 for control of the generation of one digit in the input frequency. The signals on the output lines from each select gate and from the ROM I36 to the synthesizer 128 thus control the generation of an input frequency finmn, which is applied to input 82 of phase detector 80,

as explained above.

The signals present at the output lines of each select gate will either be the first or second set of inputs, to each select gate depending on the condition of the signal on line 144. When the signal on line 144 is high, indicating that the selected output frequency is above the stepping frequency, the first set of inputs to each select 0 gate is applied on the select gate output lines to the synthesizer I28. If the signal on line I44 is low, indicating that the selected output frequency is below the stepping frequency, each select gate is controlled to apply its second set of inputs to its output lines. For example, if the input to select gate is high, the front panel in puts on lines I70, I71, I72, and 173, forming the first set of inputs to select gate 152, are connected by the select gate 152 to output lines I76, 177, 178 and I79, respectively, which in turn are connected to the synthesizer 128 as the control signals for the 1 MHz digit for the correct input frequency. If the signal on line I44, is low, the signals on lines I81, 182, I83, and I84, which are the nines complement of the signals on lines through 173 and which form the second set of inputs to select gate I52, are connected by the select gate 152 to the output lines I76, I77, 178, and I79. respectively, for application to synthesizer 128.

Such a logic implementation is made possible because the least significant digit of the stepping frequency is the 10 MHz digit. Since the least significant digit of the stepping frequency is the 10 MHz digit, the values for the l KHz, 10 KHz, lOU KHz and 1 MHz digit places of the correct input frequency, with respect to a selected output frequency, correspond exactly to the value of the corresponding digit places of the se lectcd output frequency, if the output frequency por tion containing the selected output frequency is above the stepping frequency. Thus, the values for the l KHz, 10 KHz, 100 KHZ and 1 MHz digits of the selected output frequency may be routed directly as control signals to the 80-160 frequency synthesizer 128. For instance, if the selected output frequency is 2.366866 GHz, which has a stepping frequency of 2.24 GHz, (FIG. 9) the necessary input frequency to lock the loop from the 80-160 MHz synthesizer must be f f or 0.126866 MHz. The l KHz, l0 KHz, 100 KHz and 1 MHz values correspond in each instance identically with the values in those digit places of the selected output frequency.

Similarly, the correct values for the l KHz, KHz, 100 KHz and 1 MHz digit places of an input frequency where the desired output frequency is in a portion below the stepping frequency, is achieved by subtraction of the selected output frequency values from the stepping frequency. Since all places in the stepping frequency are zero below the 10 MHz place the correct input frequency values for those digit places may be achieved by subtracting the value for the l KHz place from 10 and the remaining places of 10 KHz to l MHz from 9. This is achieved by conventional ten and nines logic complimenting techniques. For example, if the desired output frequency is 2.428742 GHz, the correct stepping frequency, according to FIG. 8, is 2.56 GHz. The correct input frequency then must be the differ ence frequency betweenf andf or 0. I3 [258 GHz, which includes the subtractive function noted above for the l KHZ, 10 KHz, lOO KHz and l MHz digits'of the input frequency. These subtractive inputs, the sec ond set of inputs to each select gate, are generated by the complimenting circuits 186, 187, 188, and 189, respectively, for the digit places of l KHz through 1 MHz. Complimenting circuits 186, 187, and 188 are nines complimenting circuits, and complimenting circuit 189 is a tens complimenting circuit. As stated above, the correct commands to the 80-]60 MHZ synthesizer 128 for both the 100 MHz and I0 MHz place are precalculated for both the condition when the stepping frequency is above the desired output frequency, and the condition when the stepping frequency is below the desired output frequency. The commands for the 100 MHz and it) MHz places are applied directly from the ROM 136 to the synthesizer 128.

Several modifications may be made to the synthesizer of FIG. 6 to extend its range or to make it more operationally flexible. Two possible modifications are shown in FIGS. 4 and S, with the control circuits (88, 90, 92, and [26 in FIG. 6) being shown as control block 38. In FIG. 4, the invention includes a standard divider 2] having a division factor M connected between the lowpass filter 35 and the phase detector 36. This allows the VCO 37 to cover output frequencies fromf,,,,.,, Mf,, to f Mf and from f,,,,.,, Mf, to f Mf This will even further reduce the number of individual stepping frequencies required and allow f,,,, to become Mf for a given range of output frequencies. For instance. if the division factor M was set at two, the frequency of the signal from the low-pass filter will be 2f,-,, for a loop lock condition. For an f of 2f,,, and an input fre quency range off s f 2 2f only alternate steps of l. 3, 5, are necessary to again result in full output frequency coverage. Other division factors will result in further savings.

FIG. 5 shows another modification of the synthesizer of FIG. 6. Added to the phase-locked loop is a fixed fre quency source 26, a mixer 27 having inputs from the fixed frequency source 26 and the output of the VCO 28, and a low-pass filter 29. The output of the mixer 27 is applied to the low-pass filter 29, the output of which is applied to the mixer 30. This modification permits a significantly higher range of output frequencies with the same stepping frequency components of HG. 6. The output frequency from the VCO 28 is converted to a lower frequency by the mixer 27. This decrease in the frequency of the signal applied to mixer 30 results in lower stepping frequencies to achieve a given output frequency and circuit savings thereby. By converting the VCO output frequency to a lower frequency by mixer 27 a high VCO output frequency may be made to look low, for purposes of mixing with f and locking the loop.

Although a preferred embodiment of the invention has been disclosed herein for purposes of illustration, it will be understood that further changes, modifications, and substitutions in addition to those discussed above, may be incorporated in such embodiments without departing from the spirit of the invention as defined by the claims which follow.

What is claimed is:

l. A variable frequency signal generator, comprising:

closed loop circuit means operable to produce a circuit output signal of controllable frequency over an output frequency range, said closed loop circuit means including a signal generator means produc ing an output signal which is said circuit output signal, said signal generator including a control input for control of the frequency of said circuit output signal, said closed loop circuit means further including a first signal mixing means having first and second input;

first signal source means operable to produce a Step ping signal of selectively variable frequency over a first frequency range;

means applying said circuit output signal to said first input of said first signal mixing means; means applying said stepping signal to said second input ofsaid first signal mixing means, said first signal mixing means operable in response to said circuit output signal and said stepping signal to produce an output signal having sum and difference frequencies; second signal source means operable to produce an input signal of selectively variable frequency over a second frequency range;

detector means in said closed loop circuit means responsive to said difference signal from said first signal mixing means and said input signal from said second signal source means for generating a control signal when said circuit output signal applied to said first signal mixing means is higher in frequency than said stepping signal applied to said first signal mixing means, and also when said circuit output signal applied to said first signal mixing means is lower in frequency than said stepping signal applied to said first signal mixing means, said closed loop circuit being stabilized when the frequency of said input signal is equal to said difference frequency;

means applying said control signal to said control input of said signal generator means to adjust the output frequency of said circuit output signal, until said closed loop circuit means is stabilized, said closed loop circuit means capable of stabilizing at first and second output frequencies, respectively, with one input signal frequency and one stepping signal frequency, said first and second output frequencies being above and below, respectively, the frequency of said one stepping signal frequency by the amount of the frequency of said one input signal frequency;

means for selecting a desired output frequency from said output frequency range;

control means responsive to said selecting means for controlling the frequencies of said first and second signal source means, respectively, and for partially controlling the frequency of said circuit output signal such that said closed loop circuit means tends to stabilize at a selected one of said first and second output frequencies.

2. An apparatus of claim 1, wherein said control means includes logic means responsive to said selecting means for selecting one stepping signal frequency and one input signal frequency for each output frequency.

3. An apparatus of claim I, wherein said first frequency range includes a high and a low input frequency defining a first frequency separation therebetween, and wherein a second frequency separation exists between successive frequencies in said second frequency range, said second frequency separation being no greater than said first frequency separation.

4. An apparatus of claim 1, wherein said first signal source means includes means for generating a reference frequency, and means for generating a series of harmonic frequencies of said reference frequency, and further includes selective filter means responsive to said control means for discriminating selectively between said harmonic frequencies in accordance with said desired output frequency.

5. An apparatus of claim 1, wherein each single stepping frequency is associated with first and second independent portions of said output frequency range, said first independent portion including those circuit output signals having frequencies defined by adding each input frequency in turn to said single stepping frequency, and said second portion including those circuit output sig nals having frequencies formed by subtracting each input frequency in turn from said single stepping frequency.

6. An apparatus of claim l, wherein said closed loop circuit means further includes a circuit output signal level control means, said level control means comprising means for detecting the power level of a given cir cuit output signal, means coupling a portion of said given circuit output signal to said power detecting means, means for attenuating the power level of said given circuit output signal, means responsive to said power detecting means for comparing the detected power level of said given circuit output signal with a desired power level, and means controlling said attenuat ing means so as to maintain the power level of said given circuit output signal at said desired power level.

7. An apparatus of claim 1, wherein each output frequency has associated therewith a preselected stepping frequency, said control means including means producing first and second control output signals. and means applying said first and second control output signals to said signal generator means, said producing means producing said first control output signal when a selected circuit output signal is higher in frequency than its asso ciated stepping signal and producing said second control output signal when said selected circuit output signal is lower in frequency than its associated stepping signal.

8. An apparatus of claim 2, wherein said control means includes memory means for storing information representative of the one stepping frequency associated with each output frequency.

9. An apparatus of claim 1, including frequency divider means connected between said first signal mixing means and said detector means.

10. An apparatus of claim I, including a second signal mixing means having two inputs and an output and a third signal source means and including means connecting said third signal source means to one input of said second signal mixing means, means applying said circuit output signals to said other input of said second signal mixing means, and means connecting the output of said second signal mixing means to said one input of said first signal mixing means.

11. A frequency synthesizer, comprising:

a phase locked loop comprising in series connection a voltage controlled oscillator, a first signal mixing means having first and second inputs, and a phase detector having first and second inputs, wherein said voltage controlled oscillator is operable under control of said phase detector to produce circuit output signal having an output frequency controllable over an output frequency range;

first signal source means operable to produce a stepping signal having a stepping frequency;

means applying said stepping signal to said first input of said first signal mixing means, said first signal mixing means being responsive to said stepping signal at the first input thereof and to said circuit output signal at the second input thereof to generate an output signal having sum and difference frequencies;

second signal source means operable to produce an input signal having an input frequency;

means for selecting a desired output frequency, each output frequency having associated therewith one input signal frequency and one stepping signal frequency;

means applying said input signal to said first input of said phase detector, said phase detector being responsive to an input signal at its first input and to a difference frequency from said first signal mixing means at its second input to generate a control signal having a level proportional to any phase difference between said input signal and said difference frequency, said phase detector being equally re sponsive to a first difference frequency produced when a stepping signal applied to said first signal mixing means is higher in frequency by a given amount than a circuit output signal applied to said first signal mixing means, and to an identical difference frequency produced when a stepping signal applied to said first signal mixing means is lower in frequency by said given amount than a circuit output signal applied to said first signal mixing means, said voltage controlled oscillator producing first and second output frequencies with one input signal frequency and one stepping signal frequency;

control means responsive to said selecting means for controlling said voltage controlled oscillator in conjunction with said phase detector such that the selected one of said first and second output frequencies is produced; and

an output frequency level control means connected in said phase locked loop, said level control means comprising means for detecting the power level of a given circuit output signal. means coupling a portion of said given circuit output signal to said power detecting means. means for attenuating the power level of said given circuit output signal. and means responsive to said power detecting means for comparing the detected power level of said given circuit output signal with a desired power level and controlling said attenuating means so as to maintain the power level of said given circuit output sig nal at said desired power level.

12. An apparatus of claim 11, wherein said control means includes means for producing a first control output si nal when a selected output frequency is higher in frequency than its associated stepping frequency and for producing a second control output signal when a selected output frequency is lower in frequency than its associated stepping signal frequency.

13. An apparatus of claim ll. wherein said first signal source means is operable to produce a plurality of stepping signal frequencies. wherein said second signal source means is operable to produce a plurality of input signal frequencies, wherein each output frequency has associated therewith a preselected stepping frequency, and including means for generating an input control signal representative of any difference in frequency between a selected output frequency and its associated preselected stepping frequency, and means for applying said input control signal to said second signal source means, said second signal source means producing in response thereto an input signal having a frequency equal to the difference between said selected output frequency and its associated preselected step ping frequency.

14. An apparatus of claim I 1, including a second signal mixing means having two inputs and an output, and a third signal source means including means connecting said third signal source means to one input of said second signal mixing means. means applying said circuit output signals to said other input of said second signal mixing means and means connecting the output of said second signal mixing means to said one input of said first signal mixing means. 

1. A variable frequency signal generator, comprising: closed loop circuit means operable to produce a circuit output signal of controllable frequency over an output frequency range, said closed loop circuIt means including a signal generator means producing an output signal which is said circuit output signal, said signal generator including a control input for control of the frequency of said circuit output signal, said closed loop circuit means further including a first signal mixing means having first and second input; first signal source means operable to produce a stepping signal of selectively variable frequency over a first frequency range; means applying said circuit output signal to said first input of said first signal mixing means; means applying said stepping signal to said second input of said first signal mixing means, said first signal mixing means operable in response to said circuit output signal and said stepping signal to produce an output signal having sum and difference frequencies; second signal source means operable to produce an input signal of selectively variable frequency over a second frequency range; detector means in said closed loop circuit means responsive to said difference signal from said first signal mixing means and said input signal from said second signal source means for generating a control signal when said circuit output signal applied to said first signal mixing means is higher in frequency than said stepping signal applied to said first signal mixing means, and also when said circuit output signal applied to said first signal mixing means is lower in frequency than said stepping signal applied to said first signal mixing means, said closed loop circuit being stabilized when the frequency of said input signal is equal to said difference frequency; means applying said control signal to said control input of said signal generator means to adjust the output frequency of said circuit output signal, until said closed loop circuit means is stabilized, said closed loop circuit means capable of stabilizing at first and second output frequencies, respectively, with one input signal frequency and one stepping signal frequency, said first and second output frequencies being above and below, respectively, the frequency of said one stepping signal frequency by the amount of the frequency of said one input signal frequency; means for selecting a desired output frequency from said output frequency range; control means responsive to said selecting means for controlling the frequencies of said first and second signal source means, respectively, and for partially controlling the frequency of said circuit output signal such that said closed loop circuit means tends to stabilize at a selected one of said first and second output frequencies.
 2. An apparatus of claim 1, wherein said control means includes logic means responsive to said selecting means for selecting one stepping signal frequency and one input signal frequency for each output frequency.
 3. An apparatus of claim 1, wherein said first frequency range includes a high and a low input frequency defining a first frequency separation therebetween, and wherein a second frequency separation exists between successive frequencies in said second frequency range, said second frequency separation being no greater than said first frequency separation.
 4. An apparatus of claim 1, wherein said first signal source means includes means for generating a reference frequency, and means for generating a series of harmonic frequencies of said reference frequency, and further includes selective filter means responsive to said control means for discriminating selectively between said harmonic frequencies in accordance with said desired output frequency.
 5. An apparatus of claim 1, wherein each single stepping frequency is associated with first and second independent portions of said output frequency range, said first independent portion including those circuit output signals having frequencies defined by adding each input frequency in turn to said single stepping frequency, and said second portion including those circuit output signals having frequencies formed by subtraCting each input frequency in turn from said single stepping frequency.
 6. An apparatus of claim 1, wherein said closed loop circuit means further includes a circuit output signal level control means, said level control means comprising means for detecting the power level of a given circuit output signal, means coupling a portion of said given circuit output signal to said power detecting means, means for attenuating the power level of said given circuit output signal, means responsive to said power detecting means for comparing the detected power level of said given circuit output signal with a desired power level, and means controlling said attenuating means so as to maintain the power level of said given circuit output signal at said desired power level.
 7. An apparatus of claim 1, wherein each output frequency has associated therewith a preselected stepping frequency, said control means including means producing first and second control output signals, and means applying said first and second control output signals to said signal generator means, said producing means producing said first control output signal when a selected circuit output signal is higher in frequency than its associated stepping signal and producing said second control output signal when said selected circuit output signal is lower in frequency than its associated stepping signal.
 8. An apparatus of claim 2, wherein said control means includes memory means for storing information representative of the one stepping frequency associated with each output frequency.
 9. An apparatus of claim 1, including frequency divider means connected between said first signal mixing means and said detector means.
 10. An apparatus of claim 1, including a second signal mixing means having two inputs and an output and a third signal source means and including means connecting said third signal source means to one input of said second signal mixing means, means applying said circuit output signals to said other input of said second signal mixing means, and means connecting the output of said second signal mixing means to said one input of said first signal mixing means.
 11. A frequency synthesizer, comprising: a phase locked loop comprising in series connection a voltage controlled oscillator, a first signal mixing means having first and second inputs, and a phase detector having first and second inputs, wherein said voltage controlled oscillator is operable under control of said phase detector to produce circuit output signal having an output frequency controllable over an output frequency range; first signal source means operable to produce a stepping signal having a stepping frequency; means applying said stepping signal to said first input of said first signal mixing means, said first signal mixing means being responsive to said stepping signal at the first input thereof and to said circuit output signal at the second input thereof to generate an output signal having sum and difference frequencies; second signal source means operable to produce an input signal having an input frequency; means for selecting a desired output frequency, each output frequency having associated therewith one input signal frequency and one stepping signal frequency; means applying said input signal to said first input of said phase detector, said phase detector being responsive to an input signal at its first input and to a difference frequency from said first signal mixing means at its second input to generate a control signal having a level proportional to any phase difference between said input signal and said difference frequency, said phase detector being equally responsive to a first difference frequency produced when a stepping signal applied to said first signal mixing means is higher in frequency by a given amount than a circuit output signal applied to said first signal mixing means, and to an identical difference frequency produced when a stepping signal applied to said first signal mIxing means is lower in frequency by said given amount than a circuit output signal applied to said first signal mixing means, said voltage controlled oscillator producing first and second output frequencies with one input signal frequency and one stepping signal frequency; control means responsive to said selecting means for controlling said voltage controlled oscillator in conjunction with said phase detector such that the selected one of said first and second output frequencies is produced; and an output frequency level control means connected in said phase locked loop, said level control means comprising means for detecting the power level of a given circuit output signal, means coupling a portion of said given circuit output signal to said power detecting means, means for attenuating the power level of said given circuit output signal, and means responsive to said power detecting means for comparing the detected power level of said given circuit output signal with a desired power level and controlling said attenuating means so as to maintain the power level of said given circuit output signal at said desired power level.
 12. An apparatus of claim 11, wherein said control means includes means for producing a first control output signal when a selected output frequency is higher in frequency than its associated stepping frequency and for producing a second control output signal when a selected output frequency is lower in frequency than its associated stepping signal frequency.
 13. An apparatus of claim 11, wherein said first signal source means is operable to produce a plurality of stepping signal frequencies, wherein said second signal source means is operable to produce a plurality of input signal frequencies, wherein each output frequency has associated therewith a preselected stepping frequency, and including means for generating an input control signal representative of any difference in frequency between a selected output frequency and its associated preselected stepping frequency, and means for applying said input control signal to said second signal source means, said second signal source means producing in response thereto an input signal having a frequency equal to the difference between said selected output frequency and its associated preselected stepping frequency.
 14. An apparatus of claim 11, including a second signal mixing means having two inputs and an output, and a third signal source means including means connecting said third signal source means to one input of said second signal mixing means, means applying said circuit output signals to said other input of said second signal mixing means, and means connecting the output of said second signal mixing means to said one input of said first signal mixing means. 